Description:
- Artificial Intelligence
- Machine Learning
- Data-intensive computing
Abstract
USC researchers propose a method called Augmented Memory Computing, which allows an SRAM cell to (1) function like a standard 6 transistor (6T) SRAM cell, storing one bit of data in static format, or (2) function in an augmented mode, storing more than one bit of data in a dynamic fashion. To accomplish this, the researchers present two novel SRAM cells: an 8T cell that that can store two bits of data, one SRAM-like and one DRAM-like, and a 7T ternary bit storage augmented cell that can store a single SRAM data or can be configured to store ternary data.
Benefits
- Improves power and performance for AI computations
- Dynamically doubles memory storage capacity
- Surpasses current energy and throughput bottlenecks
- Can be combined with existing in-memory computing approaches
- Scalable with conventional materials
Market Application
In the last few decades, hardware computing platforms have become increasingly advanced as Metal-Oxide-Semiconductor Field Effect Transistors have continued to scale in accordance with Moore’s Law. However, as data-intensive applications like machine learning and artificial intelligence become more widespread and require more computing power, even state-of-the-art computing platforms have approached their limits. Memory-centric approaches offer an opportunity to mitigate current energy and throughput bottlenecks.
Publications
Sheshadri, Haripriya, et al. "Augmented memory computing: dynamically augmented SRAM storage for data intensive applications." arXiv preprint arXiv:2109.03022 (2021). https://doi.org/10.48550/arXiv.2109.03022
Stage of Development
- Simulation tested
- Available for licensing