Description:
- High power transistors
- Bipolar junction and high-mobility electron transistors
Abstract
USC researchers present a novel method for growing low-defect non-planar heterostructure transistors that resolves these challenges. The technique produces high-quality single crystalline heterostructures by employing sequential growth of non-epitaxial templates followed by an epitaxial replacement fin growth technique. This method can be used to produce single crystalline heterostructure on dielectric materials, and on substrates such as diamond that play an active role in electron and thermal conductivity.
Benefit
- Facilitates epitaxial growth of monolithic formation of heterogeneous heterostructure thin film materials and quantum structures, particularly those that will enable improved performance in power and high frequency transistors
- Exhibits higher charge density, higher breakdown field, good carrier transport properties, and high thermal conductivity
Market Application
Epitaxial heterostructures are thin layers of different semiconductor materials grown on top of each other with precise crystal lattices, enabling the creation of devices with specific electronic and optical properties. However, epitaxial heterostructure technology faces certain challenges. First, lattice mismatch can create defective spacing between layers; second, epitaxial growth of single crystalline material on a dielectric is difficult; and third, substrates with high thermal and electron conductivity present adverse conditions for heterostructure growth.
Stage of Development
- Optimization in progress
- Available for licensing