2022-048 - Edge Intelligence Computing with X-PIXEL

Description:
  • Computing
  • Neural networks
  • Artificial Intelligence

Abstract

USC researchers propose a novel edge intelligence computing paradigm that employs in-pixel, massively parallel analog computing. The system utilizes monolithically or heterogeneously integrated memory and image sensors based on multi-bit, multi-channel memory embedded pixels. This paradigm would increase power, performance, and area benefit compared to traditional computing structures, allowing for mapping neural networks on sensors for quick decision making for a wide range of complex machine learning tasks.

Benefit

  • Improved power, performance, and area benefit
  • Enables massively parallel analog computing with sensor
  • Reduces data density
  • Data transfer without compromising for accuracy 
  • In-pixel processing
  • Multi-object tracking

Market Application

Traditionally, pixel, memory, and computing elements are separate entities in a vision sensor. This separation can compromise size, weight, and power and  lead to bandwidth, data processing, and switching speed bottlenecks. In this arrangement, the data produced by a sensor must be transmitted to a remote computing chip for analysis and decision making, leading to limited throughput, excessive energy consumption for data transfer, and data security concerns. As modern AI computations become increasingly server-centric, methods to enable intelligent distributed computation on edge devices like sensor chips to cloud-based servers are needed.

Stage of Development

  • Simulation tested
  • Available for exclusive and non-exclusive licensing

Patent Information:

  • Title: Embedded ROM-Based Multi-Bit, Multi-Kernel, Multi-Channel Weights in Individual Pixels for In-Pixel Computing
  • App Type: Nationalized PCT
  • Country: United States
  • Serial No.: 18/784,578
  • Patent No.:  
  • File Date: 7/25/2024
  • Issued Date:  
  • Expire Date:  
  • Patent Status: Patent Pending