Description:
Abstract
USC inventors propose an analog optical interconnect between the CMOS image sensor and the memory/processor that enables significant bandwidth reduction and promotes energy efficiency. This method would both remove the need for for ADCs between transceiver nodes and allow for analog in-memory/pixel computation, resulting in better speed, more energy efficiency, the ability to compute in the analog domain, and a reduced bandwidth requirement.
Benefits
- Improved speed
- Higher energy efficiency
- Capable of computation in analog domain
- Significantly lower bandwidth requirement
Market Application
Currently, data communication between the CMOS image sensor and the memory/processor is mediated by digital optical interconnects or digital electrical interconnects. Both of these technologies are intrinsically slow, require large amounts of power and bandwidth, and necessitate the use of an analog-to-digital converter (ADC). An analog optical interconnect would offer advantages including lower latency, decreased power consumption, and the ability to multiplex data.
Stage of Development
- Multiple interconnect prototype versions described and designed
- Available for licensing