Description:
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Wireless Communications
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UWB
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Radar
Abstract
USC researchers have developed a footprint-efficient system for implementing beamforming in multiple-antenna systems. This transceiver architecture is suitable for UWB timed arrays and allows beamforming for UWB signals. By integrating array architectures, USC’s design reduces chip area and power consumption by an order proportional to the number of antenna elements, thereby reducing system cost considerably compared to existing techniques. In addition, the architecture allows the entire array to be integrated in low-cost standard silicon CMOS technology.
Benefit
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Reduces required circuit area and power consumption
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Enables beamforming of UWB signals
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No signal distortion
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Suitable for low-cost silicon processes such as CMOS &SiGe
Market Application
UWB-based applications include high data rate and secure wireless communications, high resolution imaging and many others. In conventional architectures, a variable true-time-delay (TTD) element is required for each path of the UWB timed array to compensate for the propagation delay differences. However, the large size and high cost of integrated variable TTD blocks and phase shifters become major issues in conventional array architectures.
Publications
An Integrated Ultra-Wideband Timed Array Receiver in 0.13 μm CMOS Using a Path-Sharing True Time Delay Architecture, IEEE Journal of Solid-State Circuits, Dec. 2007
Other